Cpu Glossary
Browse 16 cpu terms defined in plain English, from the cultural dictionary of computing.
16 Cpu Terms
- Branch Prediction
- A CPU optimization that guesses which way a conditional branch (if/else) will go and speculatively executes that path before the condition is evaluated. If the...
- Clock Speed
- The frequency at which a processor's internal clock oscillates, measured in hertz (Hz), which determines the rate at which it can execute instructions — though...
- Instruction Set
- The complete set of machine-level instructions that a CPU can execute, defining the interface between software and hardware. x86, ARM, and RISC-V are...
- L1 Cache
- The smallest and fastest cache memory embedded directly on each CPU core, typically split into separate instruction (L1i) and data (L1d) caches of 32–64 KB...
- L2 Cache
- A mid-level CPU cache, typically 256 KB to 1 MB per core, that sits between L1 and L3 in the memory hierarchy with access latencies of roughly 10–20 cycles —...
- L3 Cache
- The largest on-chip CPU cache, typically 8–64 MB shared across all cores, with access latencies of 30–50 cycles. It acts as the last line of defense before the...
- Machine Code
- The lowest-level representation of a program — raw binary instructions that a CPU can execute directly without any translation or interpretation.
- Machine Instruction
- A single binary-encoded operation that a CPU can execute directly, consisting of an opcode and zero or more operands. Each instruction set architecture (x86,...
- Memory Alignment
- The requirement or practice of placing data in memory at addresses that are multiples of the data type's size (e.g., a 4-byte int at an address divisible by...
- Memory Fence
- A CPU instruction (also called a memory barrier) that enforces ordering constraints on memory operations, preventing the processor or compiler from reordering...
- Mnemonic
- A human-readable abbreviation for a machine instruction in assembly language — like MOV, ADD, JMP — making raw CPU operations easier to read and write than raw...
- Opcode
- Operation code — the numeric portion of a machine language instruction that specifies the operation to perform, such as addition, memory load, or jump.
- Performance Counter
- A special-purpose register built into the CPU that counts low-level hardware events such as clock cycles, instructions retired, cache hits/misses, and branch...
- Program Counter
- A CPU register that holds the memory address of the next instruction to be executed. After each instruction fetch, the program counter is automatically...
- Register
- A small, fast storage location inside a CPU used to hold data currently being processed, such as operands, addresses, or instruction results.
- Spectre
- A class of hardware vulnerabilities (disclosed January 2018) that exploit speculative execution in modern CPUs to trick a process into leaking data from its...
Related Topics
- Performance (6 terms in common)
- Hardware (4 terms in common)
- Assembly (4 terms in common)
- Low Level (4 terms in common)
- Memory Hierarchy (3 terms in common)
- Binary (1 terms in common)
- Speculative Execution (1 terms in common)
- Isa (1 terms in common)
- Systems Programming (1 terms in common)
- Memory (1 terms in common)
- Security (1 terms in common)
- Computer Architecture (1 terms in common)
- Memory Model (1 terms in common)
- Hardware Vulnerability (1 terms in common)
- Architecture (1 terms in common)
- Concurrency (1 terms in common)
- Profiling (1 terms in common)