Memory Fence

Definitions

1. A CPU instruction (also called a memory barrier) that enforces ordering constraints on memory operations, preventing the processor or compiler from reordering reads and writes across the fence. Essential for correct lock-free programming on architectures with weak memory ordering like ARM.

   In plain English: A command that tells the processor 'finish all memory reads and writes before this point before doing any after it,' preventing invisible reordering bugs.

   Example: "Without a memory fence after the flag write, the other core might see the flag set before the data it's guarding is actually visible."

Related Terms

• MVCC
• semaphore
• Elixir
• Erlang
• Memory Model
• Memory Order
• Read-Copy-Update
• Spectre
• Transactional Memory