Memory Barrier

Definitions

1. A CPU instruction that enforces ordering constraints on memory operations. Modern CPUs reorder reads and writes for performance, which can cause bugs in multi-threaded code. Memory barriers (fences) prevent specific reorderings. Acquire barriers ensure subsequent reads see all prior writes; release barriers ensure all writes are visible before the barrier.

   In plain English: A CPU instruction that prevents memory operations from being reordered, ensuring threads see changes in the correct order.

   Example: "Without a memory barrier, Thread B might see the flag set to true before seeing the data it's supposed to protect -- the CPU reordered the writes."

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